Field
This disclosure relates generally to semiconductor manufacturing, and more specifically, to split-gate NVM cells.
Related Art
In manufacturing non-volatile memories (NVMs), as well as semiconductor manufacturing in general, there is a continuing push to reduce the size of the various semiconductor devices on a given integrated circuit. One way this is achieved is with improving the ability to manufacture semiconductor devices with smaller dimensions such as gate length. This is typically achieved with a combination of lithography improvements and process improvements. There is similarly a continuing push to use higher performance structures such as high k dielectrics for gate dielectrics and metal for gates. The higher performance structures raise issues such as at what point in a particular process can a particular higher performance structure be introduced. The interplay between structures and the process, including the timing of the process, can become complicated.
Accordingly there is a need to provide further improvement in achieving a split-gate NVM cell that can be made using somewhat different processes from those historically used so as to be more robust as to the environments that may be involved in the required processing.